1. Field of the Invention
The present invention relates to a method of driving an anti-ferroelectric liquid crystal display (LCD) panel, and more particularly, to a method for driving an anti-ferroelectric LCD panel having signal electrode lines arranged in parallel above anti-ferroelectric liquid crystal cells, and scan electrode lines arranged in parallel below the anti-ferroelectric liquid crystal cells, perpendicular to the signal electrode lines.
2. Description of the Related Art
Referring to FIG. 1, a general anti-ferroelectric liquid crystal display apparatus 1 includes an anti-ferroelectric LCD panel 11 and a driving unit.
In the anti-ferroelectric LCD panel 11, signal electrode lines SL1, SL2, SL3, . . . , SLm are arranged in parallel above anti-ferroelectric liquid crystal cells LC, and scan electrode lines CL1, CL2, CL3, . . . , CLn are arranged below the anti-ferroelectric liquid crystal cells LC, perpendicular to the signal electrode lines SL1, SL2, SL3, . . . , SLm. The scan electrode lines CL1, CL2, CL3, . . . , CLn and the signal electrode lines SL1, SL2, SL3, . . . , SLm are formed from a transparent conductor, such as, indium-tin-oxide (ITO).
The driving unit includes a controller 14, a segment driver 12, a modulation signal generator 131, and a common driver 132. The controller 14 processes a video signal Sc received from a host, for example, a notebook computer, and generates a data signal ‘DATA,’ a shift clock signal ‘SCK,’ a frame signal ‘FLM,’ and a latch clock signal ‘LCK.’ The segment driver 12 holds the data signal DATA for the individual signal electrode lines SL1, SL2, SL3, . . . , SLm according to the shift clock signal SCK. In addition, the segment driver 12 applies a signal voltage corresponding to the waiting data signal DATA to the individual signal electrode lines SL1, SL2, SL3, . . . , SLm according to the latch clock signal LCK.
The frame signal FLM indicates the start of a single frame. The modulation signal generator 131 divides the frequency of the latch clock signal LCK to generate a modulation signal. The generated modulation signal controls the polarities of the respective output voltages of the segment driver 12 and the common driver 132.
The common driver 132 sequentially applies a scan voltage to the scan electrode lines CL1, CL2, CL3, . . . , CLn according to the latch clock signal LCK, the frame signal FLM, and the modulation signal. In this manner, light is transmitted through or blocked by individual anti-ferroelectric liquid crystal cells LC in the array.
FIG. 2 shows the relationship between voltages +V and −V applied to the anti-ferroelectric liquid crystal cells LC and transmittance for light in the apparatus shown in FIG. 1.
Referring to FIG. 2, when a ground voltage VG is applied to the anti-ferroelectric liquid crystal cells LC, the anti-ferroelectric liquid crystal cells LC go into an anti-ferroelectric state. In this state, if an applied voltage gradually increases in the positive (+) direction, the anti-ferroelectric liquid crystal cells LC are converted into a positive ferroelectric state at a positive second threshold voltage +Vth2. Then, external light starts to be transmitted through the anti-ferroelectric liquid crystal cells LC (see the direction denoted by D1). Next, if the positive voltage +V gradually decreases, the positive ferroelectric state is maintained, and the transmission of light continues until the voltage reaches a positive first threshold voltage +Vth1 (see the direction denoted by D2). Next, when the positive voltage +V becomes lower than the positive first threshold voltage +Vth1, the anti-ferroelectric liquid crystal cells LC are restored to an anti-ferroelectric state, thereby blocking the external light.
When a voltage applied to the anti-ferroelectric liquid crystal cells LC gradually increases from a ground voltage VG in the negative (−) direction, the anti-ferroelectric liquid crystal cells LC are converted into a negative ferroelectric state at a negative second threshold voltage −Vth2. At this point, external light starts to be transmitted through the anti-ferroelectric liquid crystal cells LC (see the direction denoted by D3). Next, if the negative voltage −V gradually decreases, the negative ferroelectric state is maintained, and the transmission of light continues until the negative voltage −V reaches a negative first threshold voltage −Vth1 (see the direction denoted by D4). Next, when the negative voltage −V becomes lower than the negative first threshold voltage −Vth1, the anti-ferroelectric liquid crystal cells LC are restored to an anti-ferroelectric state, thereby blocking external light.
FIG. 3 shows the voltage waveforms of scan signals SC1, SC2, . . . , SCn, SC1′, SC2′, . . . , SCn′ sequentially applied to the scan electrode lines CL1, CL2, CL3, . . . , CLn of FIG. 1, and the voltage waveforms of display data signals SS1, SS2, . . . , SSn, SS1′, SS2′, . . . , SSn′ simultaneously applied to the signal electrode lines SL1, SL2, SL3, . . . , SLm of FIG. 1, according to a conventional driving method. In FIG. 3, the reference character S1 denotes a waveform diagram for a first scan electrode line CL1, the reference character S2 denotes a waveform diagram for a second scan electrode line CL2, and the reference character Sn denotes a waveform diagram for an n-th scan electrode line CLn.
Referring to FIG. 3, during a first driving step, a first scan selection voltage VCH is sequentially applied to the scan electrode lines CL1, CL2, CL3, . . . , CLn, and simultaneously first display data signals SS1, SS2, . . . , SSn, having voltages VSH and VSL lower than the first scan selection voltage VCH, are applied to the signal electrode lines SL1, SL2, SL3, . . . , SLm. In addition, while scan is not performed (for example, periods t2 through tn in the waveform diagram S1), a first sustain voltage VCM1 lower than the first scan selection voltage VCH and higher than the voltages of the first display data signals SS1, SS2, . . . , SSn is applied to a relevant one among the scan electrode lines CL1, CL2, CL3, . . . , CLn.
Accordingly, when the first scan selection voltage VCH is applied to one scan electrode line and the selection data voltage VSL is applied to selected signal electrode lines, selected anti-ferroelectric liquid crystal cells LC (shown in FIG. 1) are converted into a positive ferroelectric state. Accordingly, external light begins to be transmitted (refer to the operation corresponding to the D1 direction of FIG. 2) through the selected anti-ferroelectric liquid crystal cells LC. Next, the first sustain voltage VCM1 is applied to the scan electrode line, so the selected anti-ferroelectric liquid crystal cells LC are maintained in the positive ferroelectric state, thereby continuously transmitting light (refer to the operation corresponding to the D2 direction of FIG. 2).
In a second driving step, a second scan selection voltage VCL is sequentially applied to the scan electrode lines CL1, CL2, CL3, . . . , CLn, and simultaneously second display data signals SS1′, SS2′, . . . , SSn′ having voltages VSH and VSL, which have a lower negative level than the second scan selection voltage VCL, are applied to the signal electrode lines SL1, SL2, SL3, . . . , SLm. In addition, while scan is not performed (for example, periods t2′ through tn′ in the waveform diagram S1), a second sustain voltage VCM2, having a lower negative level than the second scan selection voltage VCL and a higher level than the voltages of the second display data signals SS1′, SS2′, . . . SSn,′ is applied to a relevant one among the scan electrode lines CL1, CL2, CL3, . . . , CLn.
Accordingly, when the second scan selection voltage VCL is applied to one scan electrode line and the selection data voltage VSH is applied to selected signal electrode lines, selected anti-ferroelectric liquid crystal cells LC are converted into a negative ferroelectric state. Accordingly, external light begins to be transmitted (refer to the operation corresponding to the D3 direction of FIG. 2) through the selected anti-ferroelectric liquid crystal cells LC. Next, the second sustain voltage VCM2 is applied to the scan electrode line, so the selected anti-ferroelectric liquid crystal cells LC are maintained in the negative ferroelectric state, thereby continuously transmitting the light (refer to the operation corresponding to the D4 direction of FIG. 2).
According to such conventional method of driving an anti-ferroelectric liquid crystal display panel, the levels of voltages (VA and VB of FIG. 4) applied for maintaining the selected states of anti-ferroelectric liquid crystal cells LC on one scan electrode line change depending on the display data signals SS1, SS2, . . . , SSn, SS1′, SS2′, . . . , SSn,′ while the scan selection voltages VCH and VCL are being applied to the other scan electrode lines. FIG. 4 shows the waveforms of voltages applied to two anti-ferroelectric liquid crystal cells LC on one scan electrode line according to the driving method shown in FIG. 3. In FIG. 4, the reference character VW1 denotes the voltage waveform applied to a first anti-ferroelectric liquid crystal cell LC, and the reference character VW2 denotes the voltage waveform applied to a second anti-ferroelectric liquid crystal cell LC on a scan electrode line. In FIG. 4, it is assumed that a first anti-ferroelectric LCD panel 11 of FIG. 1 is provided with only five scan electrode lines CL1 through CL5. In addition, it is assumed that the first anti-ferroelectric liquid crystal cell LC is defined by the first scan electrode line CL1 and a first signal electrode line SL1, and the second anti-ferroelectric liquid crystal cell LC is defined by the first scan electrode line CL1 and a second signal electrode line SL2.
Referring to FIG. 4, a voltage applied to the first and second anti-ferroelectric liquid crystal cells LC, which are turned ON during a first scan time t1 of a first frame, has a level VCH+VSL equal to the sum of the level of the first scan selection voltage VCH of FIG. 3 and the level of the logic low voltage VSL of the display data signal. During a following sustain period ranging from a scan time t2 to a scan time t5, while the first scan selection voltage VCH is applied to the other scan electrode lines CL2 through CL5, the voltage applied to the first anti-ferroelectric liquid crystal cell LC has a level VA equal to the sum of the level of the first sustain voltage VCM1 and the level of the logic low voltage VSL, if the logic low voltage VSL is applied to the first signal electrode line SL1, and has a level VB equal to a difference between the level of the first sustain voltage VCM1 and the level of the logic high voltage VSH, if the logic high voltage VSH is applied to the first signal electrode line SL1. Accordingly, during the sustain period ranging from t2 to t5, the voltage applied to the first anti-ferroelectric liquid crystal cell LC is constant at the level VA equal to the sum of the level of the first sustain voltage VCM1 and the level of the logic low voltage VSL, if the logic low voltage VSL is applied to the first signal electrode line SL1, while the first scan selection voltage VCH is applied to the other scan electrode lines CL2 through CL5, as shown in FIG. 4 (see the waveform VW1).
Meanwhile, during the sustain period ranging from t2 to t5 following the first scan time t1 in the first frame, while the first scan selection voltage VCH is applied to the other scan electrode lines CL2 through CL5, a voltage applied to the second anti-ferroelectric liquid crystal cell LC has a level VA equal to the sum of the level of the first sustain voltage VCM1, and the level of the logic low voltage VSL, if the logic low voltage VSL is applied to the second signal electrode line SL2, and has a level VB equal to a difference between the level of the first sustain voltage VCM1 and the level of the logic high voltage VSH, if the logic high voltage VSH is applied to the second signal electrode line SL2. Accordingly, the voltage applied to the second anti-ferroelectric liquid crystal cell LC has the value VA equal to the sum of the level of the first sustain voltage VCM1 and the level of the logic low voltage VSL during the second, fourth, and fifth scan times t2, t4, and t5, if anti-ferroelectric liquid crystal cells LC scanned during the second, fourth, and fifth scan times t2, t4, and t5 among anti-ferroelectric liquid crystal cells LC on the second signal electrode line SL2 are turned ON, as shown in FIG. 4. However, the voltage applied to the second anti-ferroelectric liquid crystal cell LC has the value VB equal to a difference between the level of the first sustain voltage VCM1 and the level of the logic high voltage VSH during the third scan time t3, if anti-ferroelectric liquid crystal cells LC scanned during the third scan time t3 among anti-ferroelectric liquid crystal cells LC on the second signal electrode line SL2 are turned OFF, as shown in FIG. 4 (see the waveform VW2).
During a first scan time t1′ of a second frame, the voltages applied to the respective first and second anti-ferroelectric liquid crystal cells LC which are turned ON has a level VCL+VSH which is the sum of the level of the second scan selection voltage VCL of FIG. 3 and the level of the logic high voltage VSH of the display data signal. During a sustain period ranging from a second scan time t2′ to a fifth scan time t5′, while the second scan selection voltage VCL is applied to the other scan electrode lines CL2 through CL5, the voltage applied to the first anti-ferroelectric liquid crystal cell LC has a level VA equal to the sum of the level of the second sustain voltage VCM2 and the level of the logic high voltage VSH, if the logic high voltage VSH is applied to the first signal electrode line SL1, and has a level VB equal to a difference between the level of the second sustain voltage VCM2 and the level of the logic low voltage VSL, if the logic low voltage VSL is applied to the first signal electrode line SL1. Accordingly, during the sustain period ranging from t2′ to t5′, the voltage applied to the first anti-ferroelectric liquid crystal cell LC is constant at the level VA equal to the sum of the level of the second sustain voltage VCM2 and the level of the logic high voltage VSH, if the logic high voltage VSH is applied to the first signal electrode line SL1, while the second scan selection voltage VCL is applied to the other scan electrode lines CL2 through CL5, as shown in FIG. 4 (see the waveform VW1).
Meanwhile, during the sustain period ranging from t2′ to t5′ following the first scan time t1′ in the second frame, while the second scan selection voltage VCL is applied to the other scan electrode lines CL2 through CL5, a voltage applied to the second anti-ferroelectric liquid crystal cell LC has a level VA equal to the sum of the level of the second sustain voltage VCM2 and the level of the logic high voltage VSH, if the logic high voltage VSH is applied to the second signal electrode line SL2, and has a level VB equal to a difference between the level of the second sustain voltage VCM2 and the level of the logic low voltage VSL, if the logic low voltage VSL is applied to the second signal electrode line SL2. Accordingly, the voltage applied to the second anti-ferroelectric liquid crystal cell LC has the value VA equal to the sum of the level of the second sustain voltage VCM2 and the level of the logic high voltage VSH during the second, fourth, and fifth scan times t2′, t4′, and t5,′ if anti-ferroelectric liquid crystal cells LC scanned during the second, fourth, and fifth scan times t2′, t4′, and t5′ among anti-ferroelectric liquid crystal cells LC on the second signal electrode line SL2 are turned ON, as shown in FIG. 4. However, the voltage applied to the second anti-ferroelectric liquid crystal cell LC has the value VB equal to a difference between the level of the second sustain voltage VCM2 and the level of the logic low voltage VSL during the third scan time t3,′ if anti-ferroelectric liquid crystal cells LC scanned during the third scan time t3′ among anti-ferroelectric liquid crystal cells LC on the second signal electrode line SL2 are turned OFF, as shown in FIG. 4 (see the waveform VW2).
In the above-described conventional driving method, the average level of sustain voltages applied to individual selected anti-ferroelectric liquid crystal cells LC changes, which results in different transmittance. Accordingly, the display characteristics are not uniform.